The AD5323 are dual 12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 to 5.5V supply, consuming 230microA at 3V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7V/micros. The AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards. The references for the two DACs are derived from two reference pins (one per DAC). These reference inputs may be configured as buffered or unbuffered inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. There is also an asynchronous active low CLR pin that clears both DACs to 0 V. The outputs of both DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 200nA at 5 V (50nA at 3V) and provides software-selectable output loads while in power-down mode. The parts may also be used in daisy-chaining applications using the SDO pin.